收藏本站
1–10
■
Stratix IV GX (EP4SGX230DF29C2)
Chapter 1: About This MegaCore Function
Performance and Resource Utilization
Table 1–6. Serial RapidIO FPGA Resource Utilization V
Parameters
Memory
Device
Layers
Mode
Baud Rate (Gbaud)
Combinational
ALUTs
Logic
Registers
M4K,
M9K, or
M512 or
Memory
M20K (1)
ALUT (2)
Physical
layer
only
1x
4x
3.125 with external
SERDES
3.125 with external
SERDES
3,700
5,600
3,900
6,200
38
44
10
10
Stratix II
Stratix II GX
Physical and
Transport
layers, and
I/O master and
slave
Physical
layer
only
Physical and
Transport
layers, and
I/O master and
1x
4x
1x
4x
1x
4x
3.125 with external
SERDES
3.125 with external
SERDES
3.125
3.125
3.125
3.125
6,200
8,100
3,700
5,300
6,200
7,500
7,000
9,600
4,000
5,700
7,100
9,200
80
82
37
35
79
73
11
14
9
10
10
14
slave
Physical
layer
only
1x
4x
3.125 with external
SERDES
3.125 with external
SERDES
3,800
6,200
4,000
7,100
32
35
42
112
Stratix III
Stratix IV GX
Physical and
Transport
layers, and
I/O master and
slave
Physical
layer
only
Physical and
Transport
layers, and
I/O master and
1x
4x
1x
4x
1x
4x
3.125 with external
SERDES
3.125 with external
SERDES
3.125
3.125
3.125
3.125
6,200
8,800
3,700
5,200
7,100
9,000
7,200
11,200
4,000
5,900
7,600
10,300
63
62
27
25
51
51
144
403
24
38
87
83
slave
Note to Table 1–5 :
(1) M4K for Stratix II and Stratix II GX devices; M9K for Stratix III and Stratix IV devices.
(2) M512 for Stratix II and Stratix II GX devices; Memory ALUT for Stratix III, and Stratix IV GX devices.
Table 1–7 and Table 1–8 show the recommended device family speed grades for the
supported link widths and internal clock frequencies. In all cases, Altera recommends
that you set Quartus II Analysis & Synthesis Optimization Technique to Speed .
RapidIO MegaCore Function
User Guide
May 2013 Altera Corporation
发布紧急采购，3分钟左右您将得到回复。

采购需求

(若只采购一条型号，填写一行即可)

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

发布成功！您可以继续发布采购。也可以进入我的后台，查看报价

*型号 *数量 厂商 批号 封装
添加更多采购

我的联系方式

*
*
*
相关PDF资料
IP-RLDRAMII IP RLDRAM II CONTROLLER
IP-RSDEC IP REED-SOLOMON DECODER
IP-SDI IP VIDEO INTERFACE - SDI
IP-SDRAM/DDR2 IP DDR2 SDRAM CONTROLLER
IP-SLITE2 IP SERIALLITE II
IP-SRAM/QDRII IP QDRII SRAM CONTROLLER
IP-VITERBI/SS IP VITERBI LOW-SPEED
IP4220CZ6,125 IC USB DUAL ESD PROTECT 6TSOP
相关代理商/技术参数
IPRL2 制造商:Carlo Gavazzi 功能描述:
IPRL3 制造商:Carlo Gavazzi 功能描述: 制造商:Carlo Gavazzi 功能描述:IL FL PB PL 22MM GRN
IPRL6 制造商:Carlo Gavazzi 功能描述:IL FL PB PL 22MM WHT
IP-RLDII/UNI 功能描述:开发软件 RLDRAM II Controllrs MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IP-RLDRAMII 功能描述:开发软件 RLDRAM II Controllrs MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IPR-NCO 功能描述:开发软件 NCO Compiler MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IPR-NIOS 功能描述:开发软件 Nios II MegaCore RENEWAL RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
IPROBER 520 制造商:TTi-Thurlby Thandar Instruments 功能描述:Bulk 制造商:Aim & Thurlby Thandar Instruments 功能描述:PROBE, CURRENT, POSITIONAL, ON PCB TRACK 制造商:Aim & Thurlby Thandar Instruments 功能描述:PROBE, CURRENT, 5MHZ, 2M; Test Probe Ratio:-; Connector Type A:-; Connector Type B:-; Lead Length:2m; Bandwidth:5MHz; SVHC:No SVHC (19-Dec-2012) ;RoHS Compliant: NA